sfe_ade7953_lcycmode_reg_t Union Reference

Bitfield union for the 8-bit LCYCMODE register (0x004). More...

#include <sfDevADE7953.h>

Public Attributes
struct {
uint8_t   aLWatt: 1
	Active energy line cycle mode (Channel A) [bit 0]. More...
uint8_t   bLWatt: 1
	Active energy line cycle mode (Channel B) [bit 1]. More...
uint8_t   aLVar: 1
	Reactive energy line cycle mode (Channel A) [bit 2]. More...
uint8_t   bLVar: 1
	Reactive energy line cycle mode (Channel B) [bit 3]. More...
uint8_t   aLVa: 1
	Apparent energy line cycle mode (Channel A) [bit 4]. More...
uint8_t   bLVa: 1
	Apparent energy line cycle mode (Channel B) [bit 5]. More...
uint8_t   rstRead: 1
	Read-with-reset enable for all registers [bit 6]. More...
uint8_t   __pad0__: 1
	Reserved [bit 7]. More...
};
uint8_t	byte
	Raw register value for I2C read/write. More...

Detailed Description

Bitfield union for the 8-bit LCYCMODE register (0x004).

Member Data Documentation

struct { ... } sfe_ade7953_lcycmode_reg_t::@3

__pad0__

uint8_t sfe_ade7953_lcycmode_reg_t::__pad0__

Reserved [bit 7].

aLVa

uint8_t sfe_ade7953_lcycmode_reg_t::aLVa

Apparent energy line cycle mode (Channel A) [bit 4].

aLVar

uint8_t sfe_ade7953_lcycmode_reg_t::aLVar

Reactive energy line cycle mode (Channel A) [bit 2].

aLWatt

uint8_t sfe_ade7953_lcycmode_reg_t::aLWatt

Active energy line cycle mode (Channel A) [bit 0].

bLVa

uint8_t sfe_ade7953_lcycmode_reg_t::bLVa

Apparent energy line cycle mode (Channel B) [bit 5].

bLVar

uint8_t sfe_ade7953_lcycmode_reg_t::bLVar

Reactive energy line cycle mode (Channel B) [bit 3].

bLWatt

uint8_t sfe_ade7953_lcycmode_reg_t::bLWatt

Active energy line cycle mode (Channel B) [bit 1].

byte

uint8_t sfe_ade7953_lcycmode_reg_t::byte

Raw register value for I2C read/write.

rstRead

uint8_t sfe_ade7953_lcycmode_reg_t::rstRead

Read-with-reset enable for all registers [bit 6].

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The documentation for this union was generated from the following file:

• src/sfTk/sfDevADE7953.h